1. Field of the Invention
The present invention relates to an oscillation frequency control circuit applicable to a local oscillator of a radio receiver, and the like.
2. Description of the Related Art
PLL circuits are known as being used in the local oscillator of radio receivers or the like and operable to produce stable oscillation frequencies. The PLL circuit comprises a VCO (Voltage Controlled Oscillator), a program counter that digitally sets a division ratio N, a reference frequency generator that generates a frequency as a reference (hereinafter called a “reference frequency”), a phase comparator, and a loop filter (hereinafter called an “LPF”). The oscillating signal output from the VCO is divided by the program counter to 1/N of its frequency. The divided signal output from the program counter is compared in the phase comparator with a reference signal output from the reference frequency generator, and the phase comparator outputs pulses according to the comparing results. The pulses output from the phase comparator are integrated by the LPF to produce a direct-current control voltage, which is fed back as an input voltage to the VCO. By this feed-back control, the oscillating signal having a stable frequency is obtained. By controlling the division ratio N, the oscillating signal having a desired frequency can be obtained. A PLL circuit having such a configuration is disclosed in, for example, Japanese Patent Application Laid-Open Publication No. H10-276084.
The LPF of the PLL circuit is usually constituted by elements such as a capacitor and a resistor which are connected externally to a microcomputer that controls the program counter and the division ratio N. Hence, the LPF is difficult to be made smaller, and particularly causes a problem in mounting on a device such as a wave clock. The presence of the external elements causes the production process to become complex and production cost to increase. When the PLL circuit is applied to the generation of a low frequency signal in, e.g., a time information receive circuit of a wave clock, there exists a limit for shortening the time until the PLL is in lock in frequency, which causes the increase of a receive wait time and a shorter battery lifetime. Furthermore, the integration constant of the loop filter greatly influences the switching speed, range of frequencies to which to be locked, and jitter resistance of the PLL circuit, and the loop filter is required to be carefully designed and adjusted considering relationships with others such as the VCO. Thus, the production process tends to be complex.